Hog (HDL on git): a collaborative management tool to handle git-based HDL repository

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In this paper, we present Hog (HDL on git), a set of Tcl scripts and a suitable methodology to allow a fruitful use of git as a HDL repository and guarantee synthesis and placing reproducibility and binary file traceability. Tcl scripts, able to recreate the HDL projects are committed to the repository. This ensures that all the modifications done to the project are correctly propagated, allowing reproducibility. To make the system more user friendly, all the source files used in each project are listed in dedicated text files that are read out by the project Tcl file and imported into the project. Hog supports Xilinx Vivado, ISE (PlanAhead) and Intel Quartus.

To guarantee binary file traceability, Hog links it permanently to a specific git commit by embedding the git-commit hash (SHA) into the binary file via HDL generics stored into firmware registers. This is done by means of a pre-synthesis script, which interacts with the git repository. The project creation and the pre/post synthesis Tcl scripts make use of the Hog utility library, that includes functions to handle git, parse tags, read list files, etc.

Gitlab Continuous Integration (CI) is automatically configured by Hog to simulate, synthesise, and build the design. Hog-CI generates binary files and checks for timing violations. This permits validating new modifications before accepting them, by exploiting the Gitlab Merge Request (MR) system. This is meant to avoid the pollution of the official branch, undermining the starting point for other developers. Hog-CI runs on shared and private (where the needed IDE must be installed) Gitlab runners. It can parse MR parameters, allowing the specification of directives through special keywords in the MR title/description on Gitlab website.

Original languageEnglish
Article number04006
JournalJournal of Instrumentation
Volume16
Issue number4
Number of pages9
ISSN1748-0221
DOIs
Publication statusPublished - Apr 2021

    Research areas

  • Digital electronic circuits, Software architectures (event data models, frameworks and databases)

ID: 269724194